Marvell Blogs

Marvell Newsroom

Archive for the 'AI' Category

  • April 20, 2026

    OFC: Lumentum Optical Circuit Switching and Marvell Optics for Scaling AI

    By Todd Rope, Vice President of Software Engineering at Marvell

    Optical circuit switching (OCS) has become one of the fastest growing segments in networking with revenue expected to exceed $3.5 billion by 2029, more than 2x over 2025.1 The unique architecture of OCS systems, however, also mean that developers and data center operators need to ensure that these systems can seamlessly integrate into data infrastructure and interoperate with existing product lines.

    Lumentum and Marvell took a significant step toward that goal with a live demonstration at OFC 2026 that combined the R300 OCS system from Lumentum with different classes of modules powered by Marvell optical DSPs. The modules included inside-the-data center modules powered by the Marvell® Ara 1.6T (5m-2km interconnects), coherent lite modules with 1.6T Marvell Aquila for campus-size connections (2 to 20km) and long-range COLORZ® 800T ZR/ZR+ modules for 10-1000km data center interconnects.

    Marvell RELIANT™, a new software platform for analyzing equipment performance and optimizing networks in real-time, was also used to monitor data transmission, power consumption, bit error rate and other metrics in the demo. Michael DeMerchant, senior director of product line management at Lumentum and I walk you through more of what RELIANT can accomplish with OCS in the video.

  • April 09, 2026

    Live from OFC: Pioneering a New Class of Interconnects—Hybrid AEC/ACC Cables—for Optimizing Infrastructure

    By Nicola Bramante, Senior Principal Engineer, Connectivity Marketing, Marvell

    Why develop a hybrid cable? Because the quest for greater optimization in AI data centers never ends.

    High speed cable developer and manufacturer Luxshare-Tech and Marvell showed off the industry’s first hybrid AEC/ACC solution at OFC 2026, the latest step in enhancing copper interconnects to meet the stringent power, performance and reach standards of AI infrastructure.

    Active electrical cables (AECs) are designed for comparatively long (~4-9 meter) high-bandwidth connections within or between racks. The boost in reach over passive copper cables is accomplished by integrating optimized AEC DSPs into the terminal ends of a cable. Active Copper Cables (ACCs), by contrast, rely on equalizers and redrivers for extending reach. ACCs consume far less power than AECs but generally are deployed for in-rack connections running 2 meters or less.

    Hybrid AEC/ACC cables combine technologies from both for a solution that delivers a longer, AEC-like reach and the low latency, low power, low cost and low complexity benefits of ACC designs.

  • February 18, 2026

    The Golden Cable Initiative: Enabling the Cable Partner Ecosystem at Hyperscale Speed

    By Michael Arsenault, Director of Product Marketing for AEC DSPs, Marvell

    Rack connectivity is undergoing a historic transformation. Data center operators are demanding both scale-up and scale-out connectivity that can move more data across longer distances and between more systems, while delivering unprecedented levels of energy efficiency and reliability.

    To help cable providers and their customers meet these challenges, Marvell has launched the Golden Cable initiative, designed to accelerate the development of active electrical cables (AECs). AECs are a rapidly growing class of high-bandwidth, enhanced copper interconnects used to link servers, switches, NICs and other assets in the same rack or across adjacent racks (about two to nine meters).

    The Golden Cable initiative delivers a validated cable architecture tested across leading platforms and built on industry-leading software, reference designs, technical data, firmware and comprehensive support. Participants can combine these assets with their own technology to develop unique AECs powered by DSPs, optimized for specific customer requirements and use cases. 

    To further enhance performance and ensure broad compatibility, Golden Cable AECs are rigorously tested in the Marvell Cloud Interoperability Lab. Here, cables are validated across a wide range of customized configuration scenarios involving leading XPUs, CPUs, NICs, servers, switches, optical modules and other critical infrastructure components. This process enables Marvell and its partners to validate AEC firmware before cables reach end-customers, significantly accelerating customer qualification and deployment timelines. The result is greater confidence from the first plug-in.

  • February 10, 2026

    Boosting AI with CXL Part III: Faster Time-to-First-Token

    By Khurram Malik, Senior Director of Marketing, Custom Cloud Solutions, Marvell

    Can AI beat a human at the game of twenty questions? Yes.

    And can a server enhanced by CXL beat an AI server without it? Yes, and by a wide margin.

    While CXL technology was originally developed for general-purpose cloud servers, the technology is now finding a home in AI as a vehicle for economically and efficiently boosting the performance of AI infrastructure.  To this end, Marvell has been conducting benchmark tests on different AI use cases.

    In December, Marvell, Samsung and Liqid showed how Marvell® StructeraTM A CXL compute accelerators can reduce the time required for conducting vector searches (for analyzing unstructured data within documents) by more than 5x.

    In February, Marvell showed how a trio of Structera A CXL compute accelerators can process more queries per second than a cutting-edge server CPU and at a lower latency while leaving the host CPU open for different computing tasks. 

    Today, this blog post will show how Structera CXL memory expanders can boost performance of inference tasks.

    AI and Memory Expansion

    Unlike CXL compute accelerators, CXL memory expanders do not contain additional processing cores for near-memory computing. Instead, they supersize memory capacity and bandwidth. Marvell Structera X, released last year, provides a path for adding up to 4TB of DDR5 DRAM or 6TB of DDR4 DRAM to servers (12TB with integrated LZ4 compression) along with 200GB/second of additional bandwidth. Multiple Structera X modules, moreover, can be added to a single server; CXL modules slot into PCIe ports rather than the more limited DIMM slots used for memory. 

    A Structera X board fully populated with DDR4 memory DIMMs

  • February 03, 2026

    Improving AI Through CXL Part II: Lower Latency

    By Khurram Malik, Senior Director of Marketing, Custom Cloud Solutions, Marvell

    While CXL technology was originally developed for general-purpose cloud servers, it is now emerging as a key enabler for boosting the performance and ROI of AI infrastructure.

    The logic is straightforward. Training and inference require rapid access to massive amounts of data. However, the memory channels on today’s XPUs and CPUs struggle to keep pace, creating the so-called “memory wall” that slows processing. CXL breaks this bottleneck by leveraging available PCIe ports to deliver additional memory bandwidth, expand memory capacity and, in some cases, integrate near-memory processors. As an added advantage, CXL provides these benefits at a lower cost and lower power profile than the usual way of adding more processors.  

    To showcase these benefits, Marvell conducted benchmark tests across multiple use cases to demonstrate how CXL technology can elevate AI performance.

    In December, Marvell and its partners showed how Marvell® StructeraTM A CXL compute accelerators can reduce the time required for vector searches used to analyze unstructured data within documents by more than 5x.

    Here’s another one: CXL is deployed to lower latency.

    Lower Latency? Through CXL?

    At first glance, lower latency and CXL might seem contradictory. Memory connected through a CXL device sits farther from the processor than memory connected via local memory channels. With standard CXL devices, this typically results in higher latency between CXL memory and the primary processor. 

    Marvell Structera A CXL memory accelerator boards with and without heat sinks.   

Archives